Calculate the quiescent output voltage and the small-signal voltage gain of the following circuit.
If we adopt the notation that V_{B1} is the voltage on the base of T1, V_{C2} is the voltage on the collector of T2 and so on, it follows that
V_{B1} = V_{CC} \frac{R_{1}}{R_{1} + R_{2}} = 10 \frac{3 kΩ}{7 kΩ + 3 kΩ} = 3.0 V \\ V_{E1} = V_{B1} – V_{BE} = 3.0 – 0.7 = 2.3 V \\ I_{C1} \approx I_{E1} = \frac{V_{E1}}{R_{E1}} = \frac {2.3 V}{1 kΩ} = 2.3 mAand therefore
V_{C1} = V_{CC} – I_{C1}R_{C1} = 10 V – 2.3 mA \times 3 k\Omega = 3.1 VV_{C1} forms the bias voltage V_{B2} for the second stage, thus
V_{E2} = V_{B2} – V_{BE} = 3.1 – 0.7 = 2.4 Vand
I_{C2} \approx I_{E2} = \frac{V_{E2}}{R_{E2}} = \frac {2.4 V}{2 kΩ} = 1.2 mATherefore
quiescent output voltage = V_{C2} = V_{CC} – I_{C2}R_{C2} = 10 V – 1.2 mA \times 4 kΩ = 5.2 V
Voltage gain
Calculation of the voltage gain of the amplifier is also straightforward. In the absence of additional base-bias resistors, the input resistance of the second stage is at least h_{fe} times R_{E2} (see Example 19.5). This is likely to be greater than 100 kΩ and is certainly large compared with the output resistance of the previous stage, which must be less than R_{C1} (3 kΩ). Therefore, loading effects can be ignored and the gain of the combination is simply the product of the gains of the two stages when considered separately. These gains are given simply by the ratios of the collector and emitter resistors (see Example 19.4). Therefore
overall gain = gain of stage 1 × gain of stage 2 = -\frac{R_{C1}}{R_{E1}} \times – \frac{R_{C2}}{R_{E2}} = -\frac{3 kΩ}{1 kΩ} \times -\frac{4 kΩ}{2 kΩ} = -3 \times -2 = 6