Identical JFETs characterized by i_G = 0, I_{DSS} = 10 \text{mA}, and V_{p0} = 4 \text{V} are connected as shown in Fig. 4-24. Let R_D = 1 kΩ, R_S = 2 kΩ, and V_{DD} = 15 \text{V}, and find (a) V_{GSQ1}, (b) I_{DQ2}, (c) V_{GSQ2}, (d) V_{DSQ1}, and (e) V_{DSQ2}.
(a) With negligible gate current, (4.2) gives
i_D = I_{DSS} \left( 1 + \frac{v_{GS}}{V_{p0}} \right)^2 (4.2)
I_{G2} = I_{DQ1} = 0 = I_{DSS} \left( 1 + \frac{V_{GSQ1}}{V_{p0}} \right)^2
so V_{GSQ1} = – V_{p0} = -4 \text{V}
(b) With negligible gate current, KVL applied around the lower left-hand loop yields
V_{GSQ2} = -V_{GSQ1} – I_{DQ2}R_S (1)
Substituting (1) into (4.2) and rearranging give
I^2_{DQ2} – \left(\frac{V_{p0}}{R_S}\right)^2 \left[\frac{1}{I_{DSS}} + 2 \left(1 – \frac{V_{GSQ1}}{V_{p0}}\right) \frac{R_S}{V_{p0}} \right] I_{DQ2} + \left(\frac{V_{p0} – V_{GSQ1}}{R_S}\right)^2 = 0
which becomes, with known values substituted,
I_{D Q 2}^2 – 8.4 \times 10^{-3} I_{D Q 2} + 1.6 \times 10^{-5} = 0
The quadratic formula may be used to find the relevant root I_{D Q 2} = 2.92 \text{mA}.
(c) With negligible gate current, KVL leads to
(d) By KVL,
(e) By KVL,