A source degenerated cascode LNA as shown in Fig. 4.50(b) will be designed for f0 = 1.86 GHz (ω0 = 1.17 10^10 rad/s). The restrictions are as follows. The technology is similar to the AMS 0.35 micron technology but has a thick metal layer that permits us to realize reasonably high-Q on-chip

Question

A source degenerated cascode LNA as shown in Fig. 4.50(b) will be designed for [latex]f_0 = 1.86 GHz (\omega_0 = 1.17 imes 10^{10}[/latex] rad/s). The restrictions are as follows.
The technology is similar to the AMS 0.35 micron technology but has a thick metal layer that permits us to realize reasonably high-Q on-chip inductors. The main parameters related to the NMOS transistors are [latex]C_{ox} = 4.54 imes 10^{-7} F/cm^2, k_{ol}= 0.74,{}^{24} \mu_n = 325[/latex] (as an average value that corresponds to [latex]V_{GS} = 1 V^{25}[/latex]). The numerical value of the A parameter is calculated as [latex]2.47 imes 10^{11}[/latex].
The DC current shall not exceed 4 mA.
The on-chip inductors will be chosen from a library that contains a number of wellcharacterized inductors: L = 0.5 nH, 1 nH, 2 nH, 5 nH and 10 nH and Q = 10 at 1.86 GHz.
The antenna is a “folded loop antenna” designed for 1.86 GHz, whose impedance is
[latex]Z_A = 44.7-j 9.73[/latex] ohm, for unbalanced use.[latex]{}^{26}[/latex]
The temperature of the antenna and the average temperature of the chip are assumed to be 300 K and 330 K, respectively.

Accepted Answer

The design can be initiated at one of several possible starting points. Let us start with (4.116), with a DC current smaller than the allowed maximum value to reserve a margin for probable iterations, and the possible minimum [latex]L_S[/latex] value; [latex]I_D[/latex] = 3 mA,[latex] L_S= 0.5 nH[/latex]. It is necessary to estimate a value for [latex]R_A-(R_S + R_G)[/latex] in (4.116), and check its validity later on. Let us assume [latex]R_A-(RS + RG) = 30[/latex] ohm. With these starting values (4.116) yields W = 508 μm that corresponds to [latex]C_{gs}[/latex] = 597 fF according to (1.40). Now LG can be calculated from (4.118):

[latex]L_G=\frac{1}{(1.17 imes 10^{10})^2(597 imes 10^{-15})}-0.5 imes 10^{-9}-(\frac{-9.73}{(1.17 imes 10^{10})})=12.53 nH[/latex]

Since we have to use inductors from the library, it is necessary to perform an iteration with 10 nH, the closest inductor value to 12.53 nH. With [latex]L_G = 10[/latex] nH (4.118) yields [latex]C_{gs} = 755 fF[/latex], which corresponds to W = 642 μm. To satisfy (4.116) with this value and [latex]L_S = 0.5 nH, I_D[/latex] must be 3.79 mA which is smaller than the allowed maximum value.

Now we must calculate the source and drain series resistance and check if the condition on ([latex]R_S + R_G[/latex]) is reasonably close to the initial assumption.
[latex]R_S[/latex] is the sum of the effective series resistance of LS and the inherent source series resistance of M1. The series resistance RSL of LS can be calculated from (4.14) as

[latex]R_{SL}=\frac{L_S \omega_0}{Q}=\frac{(0.5 imes 10^{-9})(1.17 imes 10^{10})}{10}\cong 0.585[/latex]ohm

The inherent source series resistance of[latex] M1, R_{SM1}[/latex] is calculated as in Example 4.10
and found to be 0.545 ohm. Therefore,

[latex]R_S=R_{SL}+R_{SM1}=1.13[/latex]ohm

Similarly, the total series gate resistance, [latex]R_G[/latex], which is the sum of the effective series resistance of [latex]L_G[/latex] and the inherent gate series resistance of M1 can be found as 12.52 ohm. With these values

[latex]R_A-(R_S+R_G)=44.7-(1.13+12.52)=31.05[/latex]ohm
which is reasonably close to the initial assumption.
The parameters in (4.138) now can be calculated.

[latex]g_{m1}=\sqrt{2\mu_n C_{ox}(W/L)I_D}-\sqrt{2 imes 325 imes (4.54 imes 10^{-7})(642/0.35)(3.8 imes 10^{-3})}=44.7 mS[/latex]

From (4.120)

[latex]\left|Y_{mG}(\omega_0) ight|^2=\frac{(44.7 imes 10^{-3})^2}{\left[(44.7 imes 10^{-3}) imes 1.13 ight]^2+ \left[2 imes (1.17 imes 10^{10}) imes (755 imes 10^{-15}) imes 44.7 ight]^2}=3.2 imes 10^{-3}[/latex][S²]

Question 4.11: A source degenerated cascode LNA as shown in Fig. 4.50(b) wi...

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