An A/D converter incorporates a resistor ladder consisting of 128 units made of n-well to generate equally-spaced reference voltages (Fig. 19.33). If the two ends of the ladder are connected to V1 = +1 V and V2 = +2 V, calculate the ratio R128/R1.

Question

An A/D converter incorporates a resistor ladder consisting of 128 units made of n-well to generate equally-spaced reference voltages (Fig. 19.33). If the two ends of the ladder are connected to [latex] V_1=+1 V ext { and } V_2=+2 V [/latex], calculate the ratio [latex] R_{128} / R_1 [/latex].

Accepted Answer

The width of the depletion region inside the n-well is given by [latex]x_d=\sqrt{2 \epsilon_{s i}\left(\phi_B+V_R ight) /\left(q N_{w e l l} ight)}[/latex], where [latex]N_{w e l l}[/latex] denotes the n-well doping level and [latex]V_R[/latex] the reverse bias voltage. Assuming that the zero-bias depth of the n-well is equal to [latex]t_0[/latex], we have

[latex] \begin{aligned} \frac{R_{128}}{R_1} &=\frac{t_0-\sqrt{\frac{2 \epsilon_{s i}}{q N_{ ext {well }}}\left(\phi_B+V_1 ight)}+\sqrt{\frac{2 \epsilon_{s i}}{q N_{w e l l}} \phi_B}}{t_0-\sqrt{\frac{2 \epsilon_{s i}}{q N_{ ext {well }}}\left(\phi_B+V_2 ight)}+\sqrt{\frac{2 \epsilon_{s i}}{q N_{ ext {well }}} \phi_B}} &(19.10)\ &=\frac{t_0+\sqrt{\frac{2 \epsilon_{s i}}{q N_{ ext {well }}} \phi_B}\left(1-\sqrt{1+\frac{V_1}{\phi_B}} ight)}{t_0+\sqrt{\frac{2 \epsilon_{s i}}{q N_{ ext {well }}} \phi_B}\left(1-\sqrt{1+\frac{V_2}{\phi_B}} ight)}&(19.11) \end{aligned} [/latex]

If the difference between [latex] R_1 ext { and } R_{128} [/latex] is small, we can divide the numerator and denominator of (19.11) by t0 and approximate the result as

[latex] \begin{aligned} \frac{R_{128}}{R_1} & \approx\left[1+\frac{1}{t_0} \sqrt{\frac{2 \epsilon_{s i}}{q N_{ ext {well }}} \phi_B}\left(1-\sqrt{1+\frac{V_1}{\phi_B}} ight) ight]\left[1-\frac{1}{t_0} \sqrt{\frac{2 \epsilon_{s i}}{q N_{ ext {well }}} \phi_B}\left(1-\sqrt{1+\frac{V_2}{\phi_B}} ight) ight] &(19.12)\ & \approx 1+\frac{1}{t_0} \sqrt{\frac{2 \epsilon_{s i}}{q N_{ ext {well }}} \phi_B}\left(\sqrt{1+\frac{V_2}{\phi_B}}-\sqrt{1+\frac{V_1}{\phi_B}} ight)&(19.13) \end{aligned} [/latex]

For example, if [latex] t_0=2 \mu m , N_{ ext {well }}=10^{16} cm ^{-1} ext {, and } \phi_B=0.7 V [/latex], the mismatch between [latex] R_{128} ext { and } R_1 [/latex] is nearly 60%.

Question 19.3: An A/D converter incorporates a resistor ladder consisting o...

Related Answered Questions

Verified Answer:

In a 600-MHz, 2-V CMOS microprocessor containing 15 million transistors, the supply current varies by 25 A in approximately 5 ns [5]. If the processor provides 200 bond wires for ground and 200 for VDD, estimate the resulting supply bounce. ...

Verified Answer:

Calculate the capacitance of a metal 4 pad and a metal 4/metal 3 pad. Assume dimensions of 75 μm × 75 μm and use the capacitance data shown in Fig. 19.50. ...

Verified Answer:

In the layout of Fig. 19.44, a 100-μm metal 4 line is connected to a sequence of vias and contacts to reach the gate of a transistor. Calculate the thermal noise contributed by the line and the contacts. ...

Verified Answer:

The circuit of Fig. 19.37(a) is designed for a nominal gain of C1/C2 = 8. How should C1 and C2 be laid out to ensure precise definition of the gain? ...

Verified Answer:

Consider the bandgap circuit shown in Fig. 19.27. Choose the values of n, R1, and R2 such that Vout exhibits a zero temperature coefficient and the layout can be designed for high precision. ...

Verified Answer:

Verified Answer: