Question 10.8: Determine the pulse widths and show the timing diagram (rela...
Determine the pulse widths and show the timing diagram (relationships of the input and output pulses) for the circuit in Figure 10–46 .

The blue check mark means that this solution has been answered and checked by an expert. This guarantees that the final answer is accurate.
Learn more on how we answer questions.
Learn more on how we answer questions.
The time relationship of the inputs and outputs are shown in Figure 10–47 . The pulse widths for the two one shots are
\begin{array}{c}t_{W 1}=1.1 R_1 C_{\text {ext } 1}=1.1(100 \mathrm{k} \Omega)(1.0 \mu \mathrm{F})=110 \mathrm{~ms} \\t_{W 2}=1.1 R_2 C_{\text {ext } 2}=1.1(2.2 \mathrm{k} \Omega)(0.47 \mu \mathrm{F})=1.14 \mathrm{~ms}\end{array}P R A C T I C E EXERCISE
Suggest a way that the circuit in Figure 10–46 can be modified so that the delay can be made adjustable from 10 ms to 200 ms.
Related Answered Questions
Question: 10.6
Verified Answer:
f=\frac{1.44}{\left(R_1+2 R_2\right) C_{\ma...
Question: 10.7
Verified Answer:
You can determine the pulse width in two ways. You...
Question: 10.5
Verified Answer:
(a) First, find the gate voltage in order to estab...
Question: 10.4
Verified Answer:
f=\frac{1}{4 R_1 C}\left(\frac{R_2}{R_3}\ri...
Question: 10.3
Verified Answer:
(a) C_{\mathrm{T}}=\frac{C_1 C_2}{C_1+C_2}=...
Question: 10.2
Verified Answer:
(a) A_{c l}=29 \text {, and } B=\frac{1}{29...
Question: 10.1
Verified Answer:
For the lead-lag network, R_1=R_2=R=10 \ma...