In a certain microprocessor, the clock rate is 2GHz and the logic-level voltage is 1V. The capacitance associated with each gate or memory cell is about (10^−14 F), which is a realistic value. (a) What is the power dissipation per gate or memory cell? (b) The microprocessor contains a total of 10^8

Question

In a certain microprocessor, the clock rate is [latex]2 GHz[/latex] and the logic-level voltage is [latex]1 V[/latex]. The capacitance associated with each gate or memory cell is about [latex]10 fF[/latex] [latex]\left(10^{-14} F \right)[/latex], which is a realistic value. (a) What is the power dissipation per gate or memory cell? (b) The microprocessor contains a total of [latex]10^8[/latex] gates and memory cells, but on average, only [latex]10 \%[/latex] are switching at any given time. If (8.88) is valid, what is the average power dissipated by the microprocessor?

Accepted Answer

(a) From (8.88), the power dissipation per device is

[latex] \begin{aligned} P &=\frac{1}{2} C V_0^2 f_C \\ &=\frac{1}{2}(10 fF )(1 V )^2(2 GHz )=10 \mu W . \end{aligned} [/latex] (8.90)

(b) If only about [latex] 10 \% [/latex] of the gates are switching at any given time, the total power dissipated is

[latex] P_T=\left(0.1 imes 10^8 ight)(10 \mu W )=100 W . [/latex]

Without extra measures for cooling, the microprocessor would become quite hot. Modern microprocessors are packaged with an integral heat sink and fan, and dissipate on the order of [latex]100 W cm ^{-2}[/latex] (chip area). Current projections predict an ultimate density of about [latex]10^{12}[/latex] devices per [latex]cm ^2[/latex], so heat dissipation will become an even greater problem in the future. Even today, high-performance mainframe computers require elaborate liquid cooling systems.

Question 8.28: In a certain microprocessor, the clock rate is 2GHz and the ...

Related Answered Questions

In Fig. 8.23, both switches are open for t<0 , and νC(0−)=0 . Switch S1 is closed at t=0 and switch S2 is closed at t=t1 . Obtain an expression for the voltage νC(t) across the capacitor. ...

Verified Answer:

The current through a 0.5μF capacitor is given by i(t)= 0, t<0 Ie^−t/τ,t≥0, where I=5 mA and τ=10 ms . Obtain an expression for the current through the capacitor. ...

Verified Answer:

The clock rate for a certain integrated logic circuit is 1.2 GHz. By what percentage must the supply voltage be decreased if the clock rate is to be increased by 50 % to 1.8 GHz and the power dissipation must remain the same? ...

Verified Answer:

Verified Answer:

In Fig. 8.54, V_0=10 V0=10 V, T=10 T=10 ms , t0=2 ms, and R_L=5 RL=5kΩ. The load voltage νL must be within 100 mV of the ac component of the source voltage at all times. Specify the coupling capacitor C .Calculate the voltages V1 and V2 defined by Fig.8.55 to verify your answer. ...

Verified Answer:

Figure 8.53 shows a two-stage amplifier, where νS =VScos(2πf0t), with f0=80Hz and VS=5mV. Assume the op amps are ideal. The source resistance and the output resistances of the individual amplifiers are negligible. (a) Assume the coupling capacitors are conductors and specify the resistances R1 ...

Verified Answer:

Refer to Fig. 8.21 , where the source voltage νS equals zero for times not shown. Construct a graph of the voltage νC(t) across the capacitor for -2 ms≤t≤8 ms ...

Verified Answer:

Find the equivalent capacitance at the terminals of the circuit shown in Fig. 8.25(a). ...

Verified Answer:

Refer to Fig. 8.27( a ) , where V0 is constant and the capacitors are initially uncharged, such that ν1(0)=ν2(0)=0. Obtain expressions for the voltages ν1,ν2 a very long time after the switch is closed. ...

Verified Answer:

Verified Answer: