Objective: Design a bias-stable pnp transistor circuit to meet a set of specifications.

Specifications: The circuit configuration to be designed is shown in Figure 5.57(a). The transistor Q-point values are to be: $V_{EC Q} = 7 V, I_{C Q} ≅ 0.5 mA$ , and $V_{RE} ≅ 1 V$ .

Choices: Assume transistor parameters of β = 80 and $V_{E B}(on) = 0.7 V$ . Standard resistor values are to be used in the final design.

Question

Objective: Design a bias-stable pnp transistor circuit to meet a set of specifications.

Specifications: The circuit configuration to be designed is shown in Figure 5.57(a). The transistor Q-point values are to be: [latex]V_{EC Q} = 7 V, I_{C Q} ≅ 0.5 mA[/latex], and [latex]V_{RE} ≅ 1 V[/latex].

Choices: Assume transistor parameters of β = 80 and [latex]V_{E B}(on) = 0.7 V[/latex]. Standard resistor values are to be used in the final design.

Accepted Answer

The Thevenin equivalent circuit is shown in Figure 5.57(b). The Thevenin
equivalent resistance is [latex]R_{T H} = R_{1} || R_{2}[/latex] and the Thevenin equivalent voltage, measured with respect to ground, is given by
[latex]V_{T H} = \left( \frac{R_{2}}{R_{1} + R_{R}} \right) (V^{+} − V^{−}) + V^{−} [/latex]

[latex]= \frac{1}{R_{1}} \left( \frac{R_{1} R_{2}}{R_{1} + R_{2}} \right) (V^{+} − V^{−}) + V^{−} [/latex]
For [latex]V_{RE} ≅ 1 V[/latex] and [latex]I_{C Q} ≅ 0.5 mA[/latex], then we can set
[latex]R_{E} = \frac{1}{0.5} = 2 k \Omega[/latex]

For a bias stable circuit, we want
[latex]R_{T H} = \frac{R_{1} R_{2}}{R_{1} + R_{2}} = (0.1)(1 + β) R_{E} [/latex]
= (0.1)(81)(2) = 16.2 kΩ

Then the Thevenin equivalent voltage can be written as
[latex]V_{T H} = \frac{1}{R_{1}} (16.2)[9 − (− 9)] + (− 9) = \frac{1}{R_{1}} (291.6) − 9[/latex]
The KVL equation around the E–B loop is given by
[latex]V^{+} = I_{E Q} R_{E} + V_{E B}(on) + I_{B Q} R_{T H} + V_{T H} [/latex]
The transistor is to be biased in the forward-active mode so that [latex]I_{E Q} = (1 + β)I_{B Q}[/latex] .
We then have
[latex]V^{+} = (1 + β)I_{B Q} R_{E} + V_{E B}(on) + I_{B Q} R_{T H} + V_{T H}[/latex]

For [latex]I_{C Q} = 0.5 mA[/latex], then [latex]I_{B Q} = 0.00625 mA[/latex] so we can write
[latex]9 = (81)(0.00625)(2) + 0.7 + (0.00625)(16.2) + \frac{1}{R_{1}} (291.6) − 9[/latex]
We find [latex]R_{1} = 18.0 k \Omega[/latex]. Then, from [latex]R_{T H} = R_{1} || R_{2} = 16.2 k \Omega[/latex], we find [latex]R_{2} = 162 k \Omega[/latex].
For [latex]I_{C Q} = 0.5 mA[/latex], then [latex]I_{E Q} = 0.506 mA[/latex]. The KVL equation around the E–C
loop yields
[latex]V^{+} = I_{E Q} R_{E} + V_{EC Q} + I_{C Q} R_{C} + V^{−} [/latex]
or
[latex]9 = (0.506)(2) + 7 + (0.50)R_{C} + (−9)[/latex]
which yields
[latex]R_{C} ≅ 20 k \Omega[/latex]
Trade-offs: All resistor values are standard values except for [latex]R_{2} = 162 k \Omega[/latex]. A standard discrete value of 160 kΩ is available. However, because of the bias-stable design, the Q-point will not change significantly. The change in Q-point values with a change in transistor current gain β is considered in end-of-chapter problems such as Problems 5.31 and 5.34.
Comment: In many cases, specifications such as a collector current level or an emitter–collector voltage value are not absolute, but are given as approximate values.
For this reason, the emitter resistor, for example, is determined to be 2 kΩ, which is a standard discrete resistor value. The final bias resistor values are also chosen to be standard values. However, these small changes compared to the calculated resistor values will not change the Q-point values significantly.

Question 5.17: Objective: Design a bias-stable pnp transistor circuit to me...

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