Question 4.4: Objective: Design the bias of a MOSFET circuit such that the...
Objective: Design the bias of a MOSFET circuit such that the Q-point is in the middle of the saturation region. Determine the resulting small-signal voltage gain.
Specifications: The circuit to be designed has the configuration shown in Figure 4.17. Let R1∣∣R2=100 kΩ. Design the circuit such that the Q-point is IDQ=2 mA and the Q-point is in the middle of the saturation region.
Choices: A transistor with nominal parameters VTN=1 V,k´n=80 µA/V2,W/L=25, and λ=0.015 V−1 is available.

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(dc design): The load line and the desired Q-point are given in Figure 4.18. If the Q-point is to be in the middle of the saturation region, the current at the transition point must be 4 mA.
The conductivity parameter is
Kn=2k´n⋅LW=(20.080)(25)=1 mA/V2
We can now calculate VDS(sat) at the transition point. The subscript t indicates transition point values. To determine VGSt , we use
IDt=4=Kn(VGSt − VTN)2=1(VGSt − 1)2
which yields
VGSt=3 V
Therefore
VDSt=VGSt − VTN=3 − 1=2 V
If the Q-point is in the middle of the saturation region, then VDSQ=7 V, which would yield a 10 V peak-to-peak symmetrical output voltage. From Figure 4.17, we can write
VDSQ=VDD − IDQRD
or
RD=IDQVDD − VDSQ=212 − 7=2.5 kΩ
We can determine the required quiescent gate-to-source voltage from the current equation, as follows:
IDQ=2=Kn(VGSQ − VTN)2=(1)(VGSQ − 1)2
or
VGSQ=2.41 V
Then
VGSQ=2.41=(R1 + R2R2)(VDD)=(R11)(R1 + R2R1R2)(VDD)
=R1Ri⋅VDD=R1(100)(12)
which yields
R1=498 kΩ and R2=125 kΩ
(ac analysis): The small-signal transistor parameters are
gm=2KnIDQ=2(1)(2)=2.83 mA/V
and
ro=λIDQ1=(0.015)(2)1=33.3 kΩ
The small-signal equivalent circuit is the same as shown in Figure 4.7. The small-signal voltage gain is
Av=ViVo=−gm(ro∣∣RD)=−(2.83)(33.3∣∣2.5)
or
Av=−6.58
Comment: Establishing the Q-point in the middle of the saturation region allows the maximum symmetrical swing in the output voltage, while keeping the transistor biased in the saturation region

