Question 4.SP.20: Fixed bias can also be utilized for the enhancement-mode MOS......

Fixed bias can also be utilized for the enhancement-mode MOSFET, as is illustrated by the circuit of Fig. 4-25. The MOSFET is described by the drain characteristic of Fig. 4-9. Let R1=60 kΩ, R2=40 kΩ, RD=3 kΩ, RL=1 kΩ, VDD=15 V,  and CCR_1 = 60  kΩ,  R_2 = 40  kΩ,  R_D = 3  kΩ,  R_L = 1  kΩ,  V_{DD} = 15  \text {V,  and}  C_C → ∞.   (a) Find VGSQV_{GSQ}.   (b) Graphically determine VDSQV_{DSQ} and IDQI_{DQ}.

4.25
4.9
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(a)  Assume iG=0i_G = 0. Then, by (4.3),
RG=R1R2R1 + R2andVGG=R1R1 + R2VDDR_G = \frac{R_1R_2}{R_1  +  R_2} \quad \text{and} \quad V_{GG} = \frac{R_1}{R_1  +  R_2} V_{DD}            (4.3)

VGSQ=VGG=R2R2 + R1VDD=40 × 10340 ×103 + 60 ×10315=6 VV_{G S Q} = V_{G G} = \frac{R_2}{R_2  +  R_1} V_{D D} = \frac{40  \times  10^3}{40  \times 10^3  +  60  \times 10^3} 15 = 6  \text{V}

(b)  The dc load line is constructed on Fig. 4-9 with vDSv_{DS} intercept VDD=15 VV_{DD} = 15  \text{V} and iDi_D intercept VDD/RL=5 mAV_{DD}/R_L = 5  \text{mA}.   The Q-point quantities can be read directly from projections back to the iDi_D and vDSv_{DS} axes; they are VDSQ11.3 VV_{D S Q} \approx 11.3  \text{V} and IDQ1.4 mAI_{D Q} \approx 1.4  \text{mA}.

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