Latch-up in CMOS Use the circuit in Figure 9.35 to calculate the power-supply Current IDD as a function of the current IW in the well. the current IX in the substrate, and the well-substrate current source I0 at the well junction. Assume that both transistors are active, and find conditions on the

Question

Latch-up in CMOS

Use the circuit in Figure 9.35 to calculate the power-supply Current [latex] I_{DD} [/latex] as a function of the current [latex] I_W [/latex] in the well. the current [latex] I_X [/latex] in the substrate, and the well-substrate current source [latex] I_0 [/latex] at the well junction. Assume that both transistors are active, and find conditions on the transistor common base gains α that cause [latex] I_{DD} [/latex] to become unbounded. Assume that any voltage changes occur slowly.

Accepted Answer

Because the voltage changes occur slowly, the capacitor [latex] C_{PS} [/latex] need not be considered.
By applying Kirchhoff's Current Law to the circuit of Figure 9.35, we have

[latex] I_{DD}=I_X+I_{PE} \ I_{DD}=I_W+I_{NE} \ I_W=\alpha _PI_{PE}-(1-\alpha _n)I_{NE}+I_0 \ I_X=\alpha _nI_{NE}-(1-\alpha _P)I_{PE}+I_0 [/latex]

Eliminating [latex] I_{PE} [/latex] and [latex] I_{NE} [/latex] we can write

[latex] I_{DD}=I_X+\frac{(I_W-I_0)}{\alpha _p} +\frac{(1-\alpha _n)}{\alpha _p} imes\left[\frac{(I_X-I_0)}{\alpha _n}+\frac{(1-\alpha _P)}{\alpha _n} imes(I_{DD}-I_X) ight] [/latex]

Solving this expression for [latex] I_{DD} [/latex] we have

[latex] I_{DD}=\frac{I_0-\alpha _PI_X-\alpha _nI_W}{1-(\alpha _n+\alpha _P)} [/latex]

From this expression we see that [latex] I_{DD} [/latex] tends toward infinity (and the circuit becomes latched) when the sum ([latex] α_n + α_p [/latex]) approaches unity. This condition on the transistor αs can be compared to the latch-up constraint expressed through Equation 9.3.4. Equation 9.3.4 was obtained by applying the small-signal equivalent circuit for bipolar transistors, and thus represents a condition on the circuit gain during the transient build up to the latched condition. In this example, steady state is considered, and the [latex]r_π [/latex] resistor-divider terms are not relevant. If these terms are not considered, Equation 9.3.4 simplifies to the condition [latex] β_n × β_p = 1 [/latex], or

[latex] \left(\frac{\alpha _n}{1-\alpha _n} ight) \left(\frac{\alpha _p}{1-\alpha _p} ight) =1 [/latex]

which reduces to ([latex] α_n + α_p = 1 [/latex]) as concluded above.

[latex] G_L=\beta _n imes\frac{R_X}{r_{\pi pnp}+R_X} imes\beta _p imes\frac{R_W}{r_{\pi npn}+R_W} [/latex] (9.3.4)

Question 9.7: Latch-up in CMOS Use the circuit in Figure 9.35 to calculat...

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