Question 5.13: Objective: Determine the amplification factor for the circui...
Objective: Determine the amplification factor for the circuit given in Figure 5.48(a). The transistor parameters are β = 120, V_{B E} (on) = 0.7 V, and V_{A} = ∞.
DC Solution: The voltage transfer characteristics were developed in Example 5.6 for this same circuit. The voltage transfer curve is repeated for convenience in Figure 5.48(b).
For 0.7 \leq v_{I} \leq 1.9 V, the transistor is biased in the forward-active mode and the output voltage is given by
v_{O} = 7.8 − 4v_{I}
Now bias the transistor in the center of the active region with an input voltage of
v_{I} = V_{B B} = 1.3 V. The dc output voltage is v_{O} = 2.6 V. The Q-point is shown on the transfer characteristics.
AC Solution: From v_{O} = 7.8 − 4v_{I} , we can find the change in output voltage with respect to a change in input voltage. We find
\Delta v_{O} = −4 \Delta v_{I}
The voltage gain is then
A_{v} = \frac{\Delta v_{O}}{\Delta v_{I}} = − 4
Computer Simulation: A 2 kHz sinusoidal voltage source was placed in the base circuit of Figure 5.48(a). The amplitude of the time-varying input signal was 0.2 V.
Figure 5.49 shows the output response of the circuit. A sinusoidal signal is superimposed on a dc value as we expect. The peak-to-peak output signal is approximately 1.75 V. The time-varying amplification factor is then |A_{v}| = 1.75/(2)(0.2) = 4.37.
This value agrees quite well with the hand analysis.
Comment: As the input voltage changes, we move along the voltage transfer characteristics as shown in Figure 5.50(b). The negative sign occurs because of the inverting property of the circuit.
Discussion: In this example, we have biased the transistor in the center of the active region. If the input signal \Delta v_{I} is a sinusoidal function as shown in Figure 5.50(b), then the output signal \Delta v_{O} is also a sinusoidal signal, which is the desired response for an analog circuit. (This assumes the magnitude of the sinusoidal input signal is not too large.) If the Q-point, or dc biasing, of the transistor were at v_{I} = 1.9 V and v_{O} = 0.2 V, as in Figure 5.50(c), the output response changes. Shown in the figure is a symmetrical sinusoidal input signal. When the input sinusoidal signal is on its positive cycle, the transistor remains biased in saturation and the output voltage does not change. During the negative half of the input signal, the transistor becomes biased in the active region, so a half sinusoidal output response is produced. The output signal is obviously not a replication of the input signal.
This discussion emphasizes the importance of properly biasing the transistor for analog or amplifier applications. The primary objective of this chapter, as stated previously, is to help readers become familiar with transistor circuits, but it is also to enable them to design the dc biasing of transistor circuits that are to be used in analog applications.
