Consider MOS transistors fabricated in a 0.25-μm CMOS process for which VDD = 2.5 V, Vtn = −Vtp = 0.5 V, μnCox = 115 μA/V², μpCox = 30 μA/V², λn = 0.06 V^−1, and |λp| = 0.1 V^−1. Let L = 0.25 μm and (W/L)n = (W/L)p = 1.5. Measurements indicate that for the NMOS transistor, VDSsat = 0.63 V, and for

Question

Consider MOS transistors fabricated in a 0.25-μm CMOS process for which V_DD = 2.5 V, V_tn = −V_tp = 0.5 V, μ_nC_ox = 115 μA/V², μ_pC_ox = 30 μA/V², λ_n = 0.06 V^-1, and |λ_p| = 0.1 V^-1. Let L = 0.25 μm and (W/L)_n = (W/L)_p = 1.5. Measurements indicate that for the NMOS transistor, V_DSsat = 0.63 V, and for the PMOS device, |V_DSsat| = 1 V. Calculate the drain current obtained in each of the NMOS and PMOS transistors for |V_GS| = |V_DS| = V_DD. Compare with the values that would have been obtained in the absence of velocity saturation. Also give the range of v_DS for which i_D is saturated, with and without velocity saturation.

Accepted Answer

For the NMOS transistor, V_GS = 2.5 V results in V_GS − V_tn = 2.5 − 0.5 = 2 V, which is greater than V_DSsat. Also, V_DS = 2.5 V is greater than V_DSsat ; thus both conditions in Eq. (15.12) are satisfied,

v_GS − V_t ≥ V_DSsat and v_DS ≥ V_DSsat (15.12)

and the NMOS transistor will be operating in the velocity-saturation region, and thus i_D is given by Eq. (15.11):

[latex]i_{D} = μ_{n}C_{ox} \left(\frac{W}{L}\right) V_{DSsat} \left(v_{GS} - V_{t} - \frac{1}{2}V_{DSsat}\right) (1 + λv_{DS})[/latex] (15.11)

[latex]i_{D} = 115 × 10^{−6} × 1.5 × 0.63 × \left(2.5 - 0.5 - \frac{1}{2} × 0.63\right) × (1 + 0.06 × 2.5) = 210.6 μA[/latex]

If velocity saturation were absent, the current would be

[latex]i_{D} = \frac{1}{2} (μ_{n}C_{ox}) \left(\frac{W}{L}\right)_{n} (v_{GS} - V_{tn})^{2} (1 + λv_{DS})[/latex]

[latex]= \frac{1}{2} × 115 × 10^{−6} × 1.5 × (2.5 - 0.5)^{2} × (1 + 0.06 × 2.5)[/latex]

= 396.8 μA

Thus, velocity saturation reduces the current level by nearly 50%! The saturation current, however, is obtained over a larger range of v_DS; specifically, for v_DS = 0.63 V to 2.5 V. (Of course, the current does not remain constant over this range because of channel-length modulation.) In the absence of velocity saturation, the current saturates at V_OV = V_GS − V_t = 2 V, and thus the saturation current is obtained over the range v_DS = 2 V to 2.5 V.

For the PMOS transistor, we see that since |V_GS| − |V_t| = 2 V and |V_DS| = 2.5 V are both larger than |V_DSsat| = 1 V the device will be operating in velocity saturation, and i_D can be obtained by adapting Eq. (15.11) as follows:

[latex]i_{D} = (μ_{p}C_{ox}) \left(\frac{W}{L}\right)_{p} |V_{DSsat}| \left(|v_{GS}| - |V_{tp}| - \frac{1}{2}|V_{DSsat}|\right) (1 + |λ_{p}||V_{DS}|)[/latex]

[latex]= 30 × 10^{−6} × 1.5 × 1 × \left(2.5 - 0.5 - \frac{1}{2} × 1 \right) (1 + 0.1 × 2.5) [/latex]

= 84.4 μA

Without velocity saturation, we have

[latex]i_{D} = \frac{1}{2} (μ_{p}C_{ox}) \left(\frac{W}{L}\right)_{p} (|v_{GS}| - |V_{tp}|)^{2} (1 + |λ_{p}||V_{DS}|)[/latex]

[latex]= \frac{1}{2} × 30 × 10^{−6} × 1.5 × (2.5 - 0.5 )^{2} (1 + 0.1 × 2.5)[/latex]

= 112.5 μA

Thus velocity saturation reduces the current by 25% (which is less than in the case of the NMOS transistor), and the saturated current is obtained over the range |V_DS| = 1 V to 2.5 V. In the absence of velocity saturation, the saturated i_D would have been obtained for |V_DS| = 2 V to 2.5 V.

Question 15.1: Consider MOS transistors fabricated in a 0.25-μm CMOS proces...

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