Question 16.14: Objective: Determine the currents, voltages, and power dissi...

(With Depletion Load): Assume M_{2} is cut off in the circuit in Figure 16.74(a)
so that \bar{Q} = V_{DD} = 3  V. M_{1} is on in the nonsaturation region and M_{3} is on in the saturation region. The drain current in M_{1} and M_{3} is then
i_{D} = \frac{k´_{n}}{2} \cdot \left(\frac{W}{L} \right)_{L}  (V_{GSL}  −  V_{T N L})^{2} = \frac{60}{2} \cdot \left(\frac{1}{2} \right)  (0  −  (−1))^{2}
or
i_{D} = 15  µA
The power dissipated in the circuit is then
P = i_{D} \cdot V_{DD} = (15)(3) = 45  µW
The logic 0 value of the Q output is found from
i_{D} = \frac{k´_{n}}{2} \cdot \left(\frac{W}{L} \right)_{D}  [(V_{GSD}  −  V_{T N D}) V_{DSD}  −  V^{2}_{DSD} ]

or
15 = \frac{60}{2} \cdot (2)[2(3  −  0.5)Q  −  Q^{2} ]
which yields
Q = 50.5 mV

(With Resistor Load): Again assume M_{2} is cut off in the circuit in Figure 16.74(b) so that \bar{Q} = V_{DD} = 3  V. Again M_{1} is on in the nonsaturation region. The drain current is found from
\frac{V_{DD}  −  Q}{R} = \frac{k´_{n}}{2} \cdot \left(\frac{W}{L} \right)_{D}  [2 (V_{GSD}  −  V_{T N D})  Q  −  Q^{2} ]
or
\frac{3  −  Q}{2} = \frac{60}{2} \cdot (2)[2(3 − 0.5) Q  −  Q^{2} ]
[Note that dividing by megohms on the left agrees with microamperes on the right.]
We find
Q \cong 5  mV
The drain current is then found:
i_{D} = \frac{V_{DD}  −  Q}{R} = \frac{3  −  0.005}{2} \cong 1.5  µA
The power dissipated in the circuit is then
P = i_{D} \cdot V_{DD} = (1.5)(3) = 4.5  µW
Comment: We see that the SRAM with the resistive load dissipates 10 times less power than the SRAM with the depletion-load device. Thus, for a given allowed power dissipation per chip, the memory with the resistive load could be 10 times larger than that using the depletion load device.