Question 9.2: Subthreshold Current An n-channel MOSFET process is to be b...
Subthreshold Current
An n-channel MOSFET process is to be built in a p-type region doped with 8 × 10^{16} cm^{-3} , acceptors using an n^+ polysilicon gate. The oxide thickness is 15 nm, and the gate length is 0.8 μm. What is the ratio of the leakage currcnt that flows at V_G = V_T to that at V_G = 0 ?
For an n^+ polysilicon gate, n-channel MOSFET doped with N_a = 8 \times 10^{16} acceptors cm^{-3} the flat-band voltage and \phi_p are estimated from Table 8.1 and the discussion in Sec. 8.3 to be -0.9 V and 0.36 V, respectively.
TABLE 8.1 Work Functions ( \pmb{\Phi _M} and \pmb{\Phi _S} )and Flat-Band Voltages for Commonly Used Gate Materials and p-Type Silicon with \pmb{N_a=1.1 \times 10^{15} \ cm^{-3}} .
| Gate material parameter |
Aluminum | \pmb{n^+} polysilicon | \pmb{p^+} polysilicon | Tungsten |
| Φ_M (V) | 4.1 | 4.05 | 5.17 | 4.61 |
| Φ_S (V) | 4.9 | 4.9 | 4.9 | 4.9 |
| V_{FB} (V) | -0.8 | -0.85 | 0.27 | -0.29 |
The gate-oxide capacitance C_{ox} is 2.3 \times 10^{-7} F cm^{-2} , and the threshold voltage is calculated to be 0.41 V from Equation 8.3.18.
V_T=V_{FB}+V_C+2\left|\phi _p\right| +\frac{1}{C_{ox}} \sqrt{2\epsilon _sqN_a(2\left|\phi _p\right|+V_C-V_B )} (8.3.18)
We calculate x_{dmax} = 1.28 \times 10^{-5} cm = 0.128 μm from Equation 8.3.6, and therefore C_d = 8.2 \times 10^{-8} F \ cm^{-2} .
x_{dmax}=\sqrt{\frac{4\epsilon _s\left|\phi _p\right| }{qN_a} } (8.3.6)
From Equation 9.1.29, n = 1.36, and S = 82 mV/decade.
n=1+\frac{C_d}{C_{ox}} (9.1.29)
For a threshold voltage of 0.41 V, the current is (0.41/0.082) decades lower at V_G = 0 than at V_T . That is, the current at V_G = V_T is 10^5 times that at V_G = 0 .