Question 7.5: Design a sequence generator that can generate a sequence cod......

Step 1 Design a counter with the modulus which is equal to the length of the sequence code The length of the given sequence code is 12, so a MOD-12 counter is required to control the code output as the predetermined sequence. Here, a 74LS161 is used to construct a MOD-12 counter with a synchronous load input and the count sequence is from 0100 to 1111.

Step 2 Construct the combinational circuit to implement the sequence code “110001001110” In order to generate the output of the sequence code “110001001110,” one-bit code can be output one by one at the control of the clock pulse. So a combinational circuit is required to implement the output of the sequence code. The outputs of counter act as the inputs of this combinational circuit and an output, F, are needed to output one-bit code at each clock input sequentially. After 12 o’clock pulse, a group of sequence code “110001001110” is produced and recycles again. The truth table of the combinational circuit is listed in Table 7.2.9.

This combinational circuit can implement with several methods. Here, an 8-to-1 multiplexer is chosen to implement the logic function given in Table 7.2.9. If Q_{3}Q_{2}Q_{1} are selected for selection input lines, A_{2}A_{1}A_{0} , the output expression can be obtained from Table 7.2.9 as follows:

F=m_{2}Q_{0}+m_{2}\bar{Q}_{0}+m_{4}Q_{0}+m_{6}Q_{0}+m_{6}\bar{Q}_{0}+m_{7}\bar{Q}_{0}=m_{2}+m_{4}Q_{0}+m_{6}+m_{7}\bar{Q}_{0}          (7.2.5)

The data inputs { D}_{2}={ D}_{6}=1,\,{ D}_{4}=Q_{0},\,{ D}_{7}=\bar{Q}_{0},\,{ D}_{0}={ D}_{1}={ D}_{3}={ D}_{5}=0 . The logic circuit is shown in Figure 7.2.10.