Question 16.2: Objective: Design an NMOS inverter to meet a set of specific...
Objective: Design an NMOS inverter to meet a set of specifications and determine the power dissipation in the inverter.
Specifications: The NMOS inverter with saturated load shown in Figure 16.5(a) is to be designed such that v_{O} = 0.1 V when v_{I} = 2.0 V. The circuit is biased at V_{DD} = 2.5 V. (Neglect the body effect.)
Choices: Transistors are available with parameters0 V_{T N} = 0.5 V and k´_{n} = 100 µA/V^{2}
The maximum output voltage (defined as a logic 1), neglecting the body effect, is
V_{O H} = V_{DD} − V_{T N L} = 2.5 − 0.5 = 2.0 V
For v_{I} = 2.0 V, the driver is biased in the nonsaturation region and the load is always biased in the saturation region. Setting the two drain currents equal to each other, we find, using Equation (16.21),
K_{D} [2(v_{I} − V_{T N D}) v_{O} − v^{2}_{O} ] = K_{L} (V_{DD} − v_{O} − V_{T N L})^{2} (16.21)
K_{D}[2(2.0 − 0.5)(0.1) − (0.1)^{2}] = K_{L} (2.5 − 0.1 − 0.5)^{2}
which yields
\frac{K_{D}}{K_{L}} = 12.4
If we choose (W/L)_{L} = 1, and since
\frac{K_{D}}{K_{L}} = \frac{(W/L)_{D}}{(W/L)_{L}}
then we have
\left(\frac{W}{L} \right)_{D} = 12.4
The maximum inverter current occurs for v_{O} = V_{O L} = 0.1 V and is found from
i_{D,max} = \frac{k´_{n}}{2} \cdot \left(\frac{W}{L} \right)_{D} [2(v_{I} − V_{T N D})v_{O} − v^{2}_{O} ]
= \left(\frac{0.1}{2} \right) (12.4) [2(2.0 − 0.5)(0.1) − (0.1)^{2} ] = 0.180 mA
The maximum power dissipated in the inverter is
P_{D,max} = i_{D,max} \cdot V_{DD} = (0.18)(2.5) = 0.45 mW
Comment: In the NMOS inverter with enhancement-mode load, a relatively large difference in sizes of the driver and load transistors is required to produce a relatively low output voltage V_{O L} . The load transistor width-to-length ratio cannot be reduced substantially, so the maximum power dissipation cannot be substantially reduced from the 0.45 mW