Design the width of a MOSFET such that a specified current is induced for a given applied bias.

Consider an ideal n-channel MOSFET with parameters $L=1.25 \mu \mathrm{m}, \mu_{n}=650 \mathrm{~cm}^{2} / \mathrm{V}-\mathrm{s}$ , $C_{\mathrm{ox}}=6.9 \times 10^{-8} \mathrm{~F} / \mathrm{cm}^{2}$ , and $V_{T}=0.65 \mathrm{~V} .$ Design the channel width $W$ such that $I_{D}(\mathrm{sat})=$ $4 \mathrm{~mA}$ for $V_{G S}=5 \mathrm{~V}$ .

Question

Design the width of a MOSFET such that a specified current is induced for a given applied bias.

Consider an ideal n-channel MOSFET with parameters [latex]L=1.25 \mu \mathrm{m}, \mu_{n}=650 \mathrm{~cm}^{2} / \mathrm{V}-\mathrm{s}[/latex], [latex]C_{\mathrm{ox}}=6.9 imes 10^{-8} \mathrm{~F} / \mathrm{cm}^{2}[/latex], and [latex]V_{T}=0.65 \mathrm{~V} .[/latex] Design the channel width [latex]W[/latex] such that [latex]I_{D}(\mathrm{sat})=[/latex] [latex]4 \mathrm{~mA}[/latex] for [latex]V_{G S}=5 \mathrm{~V}[/latex].

Accepted Answer

For the transition biased in the saturation region, we have, from Equation (10.66),

[latex]I_{D}(\mathrm{sat})=\frac{W \mu_{n} C_{\mathrm{ox}}}{2 L}\left(V_{G S}-V_{T} ight)^{2}[/latex] (10.66)

or

[latex]4 imes 10^{-3}=\frac{W(650)\left(6.9 imes 10^{-8} ight)}{2\left(1.25 imes 10^{-4} ight)} \cdot(5-0.65)^{2}=3.39 W[/latex]

Then

[latex]W=11.8 \mu \mathrm{m}[/latex]

Comment

The current capability of a MOSFET is directly proportional to the channel width [latex]W[/latex]. The current handling capability can be increased by increasing [latex]W[/latex].

Question 10.7: Design the width of a MOSFET such that a specified current i...

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